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ADuC7060
Table 80. T3CON MMR Bit Designations
Bit
31:18
17
16:12
11
10:9
8
7
6
5:4
3:0
Name
T3CAPEN
T3CAPSEL
T3CLKSEL
T3DIR
T3EN
T3MOD
T3SCALE
Description
Reserved.
Event enable bit.
Set by user to enable time capture of an event.
Cleared by user to disable time capture of an event.
Event select range, 0 to 31. The events are described in Table 76.
Reserved.
Clock select.
00 = 32.768 kHz oscillator.
01 = 10.24 MHz/CD.
10 = 10.24 MHz.
11 = reserved.
Count up.
Set by user for Timer3 to count up.
Cleared by user for Timer3 to count down (default).
Timer3 enable bit.
Set by user to enable Timer3.
Cleared by user to disable Timer3 (default).
Timer3 mode.
Set by user to operate in periodic mode.
Cleared by user to operate in free running mode (default mode).
Reserved.
Prescaler.
0000 = source clock/1 (default).
0100 = source clock/16.
1000 = source clock/256.
1111 = source clock/32,768.
Rev. 0 | Page 69 of 100
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